Differential amplifier circuits, such as comparators and operational amplifiers, are widely used in analog and digital circuits. Differential amplifiers provide a more stable gain, and may generally be fabricated using Integrated Circuit (IC) technologies, such as CMOS. Applying Integrated Circuit technologies significantly reduces the space (area) requirement for a circuit, as well as providing for ease of manufacturing devices using the integrated circuit.
An important consideration in integrating differential amplifier circuits, or any circuit that provides mirrored current, is that the transistors of the circuit must be as identical (or matched) as possible. Otherwise, a DC offset may develop at the output of the circuit. Accordingly, in a differential amplifier, mismatch of the input differential pair transistors causes a mismatch in the mirrored currents through the transistors. For example, in a analog to digital converter (ADC) circuit having a resolution of 5 mv, a DC offset of 50 mv at the output of the differential amplifier will cause an erroneous digital result at the output of the ADC circuit.
In CMOS differential amplifier ICs, the DC offset is a function of geometry, and other process dependent mismatches. In order to minimize the effects of the mismatch, layout techniques such as common centroid layout and interdigitization are typically used. However these layout techniques only minimize the DC offset, and once amplifier integration is complete, the resulting DC offset remains and must be dealt with.
Accordingly, a need exists to further minimize or eliminate the DC offset of integrated circuits.